This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Dream Chip 1: A Timed Priority Queue
July/August 1993 (vol. 13 no. 4)
pp. 49-51

Real-time programs often need a time-tagged priority queue that must be updated on the tick of a clock. A prime example of such a queue is a list of filter coefficients that must be changed on a given sample clock. A single chip that manages a time-tagged priority queue is proposed. The queue connects either to a static random access memory (SRAM) or directly to a digital signal processor (DSP) microprocessor. The SRAM would be part of the address space of a DSP microprocessor executing digital filter code.

Citation:
Mark Kahrs, "Dream Chip 1: A Timed Priority Queue," IEEE Micro, vol. 13, no. 4, pp. 49-51, July-Aug. 1993, doi:10.1109/40.229715
Usage of this product signifies your acceptance of the Terms of Use.