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Development of an ASIC Set for Signal Processing
November/December 1992 (vol. 12 no. 6)
pp. 24-33

An approach to signal acquisition, digitization, and processing of low-frequency physiological signals is discussed. The approach uses a chip attached to a transducer through a digital wire placed at the sensing point. The wire transmits digital information instead of an analog signal to an application-specific integrated circuit (ASIC) signal processor. This digital wire/Visp chip set produces a noise-immune signal processing system usable in a variety of biosignal processing needs. The concept is demonstrated using the Visually Evoked Potential (VEP) measurement system.

Citation:
Parimal A. Patel, Hemal N. Kothari, James F. Robb, "Development of an ASIC Set for Signal Processing," IEEE Micro, vol. 12, no. 6, pp. 24-33, Nov.-Dec. 1992, doi:10.1109/40.180243
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