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Associative Processors and Memories: A Survey
May/June 1992 (vol. 12 no. 3)
pp. 12-19
ASCII Text
x 
 
K.E. Grosspietsch, "Associative Processors and Memories: A Survey," IEEE Micro, vol. 12, no. 3, pp. 12-19, May/June, 1992.
 
 
BibTex
x
 
@article{ 10.1109/40.141599,
author = {K.E. Grosspietsch},
title = {Associative Processors and Memories: A Survey},
journal ={IEEE Micro},
volume = {12},
number = {3},
issn = {0272-1732},
year = {1992},
pages = {12-19},
doi = {http://doi.ieeecomputersociety.org/10.1109/40.141599},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Associative Processors and Memories: A Survey
IS - 3
SN - 0272-1732
SP12
EP19
EPD - 12-19
A1 - K.E. Grosspietsch,
PY - 1992
VL - 12
JA - IEEE Micro
ER -
 

The functional structure of a classical content-addressable memory (CAM) and its realization at the transistor level are described. Some unorthodox CAM approaches are briefly examined. Associative processor systems are discussed, and application-specific CAM architectures to support artificial intelligence features are surveyed. Limitations of associative processing and ways to circumvent them are addressed. The use of parallel cellular logic is considered.

Citation:
K.E. Grosspietsch, "Associative Processors and Memories: A Survey," IEEE Micro, vol. 12, no. 3, pp. 12-19, May-June 1992, doi:10.1109/40.141599
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