The Community for Technology Leaders
RSS Icon
Subscribe
Issue No.04 - July/August (1991 vol.11)
pp: 28-31, 73-78
ABSTRACT
<p>Sure System 2000, a fault-tolerant computer that couples multiprocessors to offer low-priced, high-performance systems that deal effectively with faults and failures, is presented. The architecture is based on the local redundancy technique, ensuring that no hardware or software fault can cause a system crash. Software errors can be fixed, and hardware can be replaced, upgraded, or added dynamically. Existing fault-tolerant computers are briefly reviewed, and the logic hardware system configuration of the Sure System 2000 is described. The multiprocessor and I/O architecture are examined. The SXO Sure System 2000 expandable operating system is described.</p>
CITATION
Akira Kabemoto, Hiroshi Yoshida, "The Architecture of the Sure System 2000 Communications Processor", IEEE Micro, vol.11, no. 4, pp. 28-31, 73-78, July/August 1991, doi:10.1109/40.85724
20 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool