An architecture that efficiently supports both message-passing and systolic communications in one system is presented. This architecture incorporates a variety of innovative features unifying both computational power and communications flexibility in one VLSI component, the iWarp microprocessor. The message-based communication model is discussed, and an overview of the architecture is given. Two principle iWarp components, called the communication agent and the computation agent, and the register file they share are described. The efficiencies of word-level communication are examined. The software development environment is also described.