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| Merrick Darley, Bill Kronlage, Dvaid Bural, Bob Churchill, David Pulling, Paul Wang, Rick Iwamoto, Larry Yang, "The TMS390C602A Floating-Point Coprocessor for Sparc Systems," IEEE Micro, vol. 10, no. 3, pp. 36-47, May/June, 1990. | |||
| BibTex | x | ||
| @article{ 10.1109/40.56324, author = {Merrick Darley and Bill Kronlage and Dvaid Bural and Bob Churchill and David Pulling and Paul Wang and Rick Iwamoto and Larry Yang}, title = {The TMS390C602A Floating-Point Coprocessor for Sparc Systems}, journal ={IEEE Micro}, volume = {10}, number = {3}, issn = {0272-1732}, year = {1990}, pages = {36-47}, doi = {http://doi.ieeecomputersociety.org/10.1109/40.56324}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - The TMS390C602A Floating-Point Coprocessor for Sparc Systems IS - 3 SN - 0272-1732 SP36 EP47 EPD - 36-47 A1 - Merrick Darley, A1 - Bill Kronlage, A1 - Dvaid Bural, A1 - Bob Churchill, A1 - David Pulling, A1 - Paul Wang, A1 - Rick Iwamoto, A1 - Larry Yang, PY - 1990 VL - 10 JA - IEEE Micro ER - | |||
A recent Sparc (scalable processor architecture) processor consists of a two-chip configuration, containing the TMS390C601 integer unit (IU) and the TMS390C602A floating-point unit (FPU). The second device, an innovative coprocessor that lets the processor execute single- or double-precision floating-point instructions concurrently with IU operations is described. Dedicated floating-point hardware in the FPU increases the performance of the system. Running at clock periods as small as 20 ns, the chip should deliver 5.5 million double-precision floating-point operations per second under the Linpack benchmark (50-MHz clock rate). The FPU provides single- and double-precision arithmetic functions: addition, subtraction, multiplication, division, square root, compare, and convert. To minimize its math unit's latency, the FPU uses a highly parallel architecture requiring separate math units to optimize additions and multiplications. Traps stop the execution of a program to jump to software routine for handling data-dependent errors or to execute instructions not implemented in the hardware. Benchmark results are presented.