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A CMOS Neural Network for Pattern Association
September/October 1989 (vol. 9 no. 5)
pp. 68-74

The authors present an analog complementary metal-oxide semiconductor (CMOS) version of a model for pattern association, along with discussions of design philosophy, electrical results, and a chip architecture for a 512-element, feed-forward IC. They discuss hardware implementations of neural networks and the effect of limited interconnections. They then examine network design, processor-element design, and system operation.

Citation:
Mark Walker, Paul Hasler, Lex Akers, "A CMOS Neural Network for Pattern Association," IEEE Micro, vol. 9, no. 5, pp. 68-74, Sept.-Oct. 1989, doi:10.1109/40.45828
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