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The AT&T WE32200 Design Challenge
March/April 1989 (vol. 9 no. 2)
pp. 14-25

The authors describe the performance features of the 32-bit WE32200 microprocessor and the approach they used to meet the performance goals. They then discuss the following: functional partitioning; the expanded register set; the extended instruction set; operating system support; addressing modes; arbitrary byte alignment; dynamic bus sizing; circuits; and timing and analysis.

Citation:
Victor K.L. Huang, James W. Seery, William S. Wu, Saul K. Altabet, Michael J. Killian, Simeon Aymeloglu, Thaddeus J. Gabara, Aaron L. Fisher, Inseok S. Hwang, David W. Thompson, "The AT&T WE32200 Design Challenge," IEEE Micro, vol. 9, no. 2, pp. 14-25, March-April 1989, doi:10.1109/40.24847
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