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Introduction to the Clipper Architecture
July/August 1987 (vol. 7 no. 4)
pp. 6-26
| ASCII Text | x | ||
| Colin Hunter, "Introduction to the Clipper Architecture," IEEE Micro, vol. 7, no. 4, pp. 6-26, July/August, 1987. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.1987.304875, author = {Colin Hunter}, title = {Introduction to the Clipper Architecture}, journal ={IEEE Micro}, volume = {7}, number = {4}, issn = {0272-1732}, year = {1987}, pages = {6-26}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.1987.304875}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Introduction to the Clipper Architecture IS - 4 SN - 0272-1732 SP6 EP26 EPD - 6-26 A1 - Colin Hunter, PY - 1987 KW - null VL - 7 JA - IEEE Micro ER - | |||
This 32-bit, three-chip module combines RISC and CISC features with mainframe-style cache and three-phase pipeline designs.
Citation:
Colin Hunter, "Introduction to the Clipper Architecture," IEEE Micro, vol. 7, no. 4, pp. 6-26, July-Aug. 1987, doi:10.1109/MM.1987.304875
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