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A Microprocessor-based Hypercube Supercomputer
September/October 1986 (vol. 6 no. 5)
pp. 6-17
ASCII Text
x 
 
John Hayes, Trevor Mudge, Quentin Stout, Stephen Colley, John Palmer, "A Microprocessor-based Hypercube Supercomputer," IEEE Micro, vol. 6, no. 5, pp. 6-17, September/October, 1986.
 
 
BibTex
x
 
@article{ 10.1109/MM.1986.304707,
author = {John Hayes and Trevor Mudge and Quentin Stout and Stephen Colley and John Palmer},
title = {A Microprocessor-based Hypercube Supercomputer},
journal ={IEEE Micro},
volume = {6},
number = {5},
issn = {0272-1732},
year = {1986},
pages = {6-17},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.1986.304707},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - A Microprocessor-based Hypercube Supercomputer
IS - 5
SN - 0272-1732
SP6
EP17
EPD - 6-17
A1 - John Hayes,
A1 - Trevor Mudge,
A1 - Quentin Stout,
A1 - Stephen Colley,
A1 - John Palmer,
PY - 1986
KW - null
VL - 6
JA - IEEE Micro
ER -
 
John Hayes, University of Michigan
Trevor Mudge, University of Michigan
Quentin Stout, University of Michigan
Stephen Colley, NCUBE Corporation
John Palmer, NCUBE Corporation
Each node in the NCUBE/ten parallel processor is organized around a custom, VAX-like, 32-bit CPU chip. With 1024 nodes, the NCUBE/ten provides a throughput of 500 MELOPS.
Citation:
John Hayes, Trevor Mudge, Quentin Stout, Stephen Colley, John Palmer, "A Microprocessor-based Hypercube Supercomputer," IEEE Micro, vol. 6, no. 5, pp. 6-17, Sept.-Oct. 1986, doi:10.1109/MM.1986.304707
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