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An Evaluation of 8085-based Multiprocessing on a Timeshared Bus
May/June 1985 (vol. 5 no. 3)
pp. 11-21
| ASCII Text | x | ||
| Brian Corrigan, Everett Johnson, "An Evaluation of 8085-based Multiprocessing on a Timeshared Bus," IEEE Micro, vol. 5, no. 3, pp. 11-21, May/June, 1985. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.1985.304561, author = {Brian Corrigan and Everett Johnson}, title = {An Evaluation of 8085-based Multiprocessing on a Timeshared Bus}, journal ={IEEE Micro}, volume = {5}, number = {3}, issn = {0272-1732}, year = {1985}, pages = {11-21}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.1985.304561}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - An Evaluation of 8085-based Multiprocessing on a Timeshared Bus IS - 3 SN - 0272-1732 SP11 EP21 EPD - 11-21 A1 - Brian Corrigan, A1 - Everett Johnson, PY - 1985 KW - null VL - 5 JA - IEEE Micro ER - | |||
A GPSS simulation of a dual-processor system showed the effects of instruction type, bus access length, guard band length, clock frequency, and clock synchronization on its operation.
Citation:
Brian Corrigan, Everett Johnson, "An Evaluation of 8085-based Multiprocessing on a Timeshared Bus," IEEE Micro, vol. 5, no. 3, pp. 11-21, May-June 1985, doi:10.1109/MM.1985.304561
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