Issue No.01 - Feb. (2013 vol.30)
G. Smith , Gary Smith EDA, Santa Clara, CA, USA
Gary Smith gives an outlook that looks forward all the way to 2025 and gives insight as to how parallel EDA plays a role in reducing cost.
parallel processing, cost reduction, electronic design automation, electronic design automation, parallel EDA, cost reduction, System-on-a-chip, Design methodology, Computational modeling, Mobile communication, Parallel computing, Costs, Semiconductor device manufacture
G. Smith, "Time Is Money", IEEE Design & Test of Computers, vol.30, no. 1, pp. 55-57, Feb. 2013, doi:10.1109/MDT.2012.2228294