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Advances in Parallel Discrete Event Simulation for Electronic System-Level Design
Feb. 2013 (vol. 30 no. 1)
pp. 45-54
Weiwei Chen, Center for Embedded Comput. Syst., Univ. of California, Irvine, Irvine, CA, USA
Xu Han, Center for Embedded Comput. Syst., Univ. of California, Irvine, Irvine, CA, USA
Che-Wei Chang, Center for Embedded Comput. Syst., Univ. of California, Irvine, Irvine, CA, USA
R. Domer, Center for Embedded Comput. Syst., Univ. of California, Irvine, Irvine, CA, USA
Editors' notes: The authors target the speeding up of parallel discrete event simulations in transaction-level models.
Index Terms:
parallel processing,discrete event simulation,high level synthesis,transaction-level models,parallel discrete event simulation,electronic system-level design,Message systems,Decoding,Benchmark testing,Synchronization,Parallel processing,Streaming media,System-level design
Citation:
Weiwei Chen, Xu Han, Che-Wei Chang, R. Domer, "Advances in Parallel Discrete Event Simulation for Electronic System-Level Design," IEEE Design & Test of Computers, vol. 30, no. 1, pp. 45-54, Feb. 2013, doi:10.1109/MDT.2012.2226015
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