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Roadmapping Power
September/October 2011 (vol. 28 no. 5)
pp. 104-106
Andrew B. Kahng, University of California, San Diego

How will today's technology advance to the enablement of hundreds of teraoperations per square centimeter of silicon, and hundreds of terabits per second transmitted both intra- and inter-chip, delivering the desired user experiences while always staying within market-determined power limits? This is where a "power roadmap" comes into play, bringing issues that are examined in this column.

Index Terms:
design and test, roadmapping
Citation:
Andrew B. Kahng, "Roadmapping Power," IEEE Design & Test of Computers, vol. 28, no. 5, pp. 104-106, Sept.-Oct. 2011, doi:10.1109/MDT.2011.115
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