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A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines
September/October 2011 (vol. 28 no. 5)
pp. 62-71
Rafael Iankowski Soares, Federal University of Pelotas

Editors' note:

This article presents the design of a cryptographic chip using a globally asynchronous, locally synchronous (GALS) design methodology. The design demonstrates the key advantage of using asynchrony in cryptography: the randomization of event timing internal to the chip leads to a dramatic increase in its robustness to side-channel attacks based on power and electromagnetic emission signatures.

—Montek Singh (UNC Chapel Hill) and Luciano Lavagno (Politecnico di Torino)

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Index Terms:
design and test, GALS, asynchronous, cryptography attacks, SCA, DPA, DEMA
Citation:
Rafael Iankowski Soares, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Philippe Maurine, Lionel Torres, "A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines," IEEE Design & Test of Computers, vol. 28, no. 5, pp. 62-71, Sept.-Oct. 2011, doi:10.1109/MDT.2011.69
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