Subscribe

Issue No.04 - July/August (2011 vol.28)

pp: 8-17

Adam B. Kinsman , Accelyst Technologies

Nicola Nicolici , McMaster University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2011.48

ABSTRACT

<p>Editor's note:</p><p>Data representation is an important problem for scientific computing problems that are mapped to FPGAs. The key challenge here is to derive best trade-offs between precision and performance. This article describes methods to manage the complexity associated with the analysis of data representation techniques so that we thereby understand precision/performance trade-offs.</p><p align="right">—Krishnendu Chakrabarty, IEEE Design & Test editor in chief</p>

INDEX TERMS

FPGA, scientific computing, computer arithmetic, finite precision, fixed-point, floating-point, reconfigurable system, numerical data representation

CITATION

Adam B. Kinsman, Nicola Nicolici, "Numerical Data Representations for FPGA-Based Scientific Computing",

*IEEE Design & Test of Computers*, vol.28, no. 4, pp. 8-17, July/August 2011, doi:10.1109/MDT.2011.48REFERENCES

- 1. G.A. Constantinides, P.Y.K. Cheung, and W. Luk,
Synthesis and Optimization of DSP Algorithms, Kluwer Academic Publishers, 2004.- 2. B. Parhami,
Computer Arithmetic, 2nd ed., Oxford Univ. Press, 2009.- 3. A. Buttari et al., "Using Mixed Precision for Sparse Matrix Computations to Enhance the Performance While Achieving 64-Bit Accuracy,"
ACM Trans. Mathematical Software, vol. 34, no. 4, 2008, article 17. - 4. N.J. Higham,
Accuracy and Stability of Numerical Algorithms, 2nd ed., Soc. for Industrial and Applied Mathematics, 2002.- 5. A.R. Lopes et al., "More Flops or More Precision? Accuracy Parameterizable Linear Equation Solvers for Model Predictive Control,"
Proc. 17th IEEE Symp. Field Programmable Custom Computing Machines (FCCM 09), IEEE CS Press, 2009, pp. 209-216.- 6. L. Fousse et al., "MPFR: A Multiple-Precision Binary Floating-Point Library with Correct Rounding,"
ACM Trans. Mathematical Software, vol. 33, no. 2, 2007, article 13. - 7. A. Mallik et al., "Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment,"
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 3, 2007, pp. 447-455.- 8. P. Belanovic and M. Rupp, "Automated Floating-Point to Fixed-Point Conversion with the Fixify Environment,"
Proc. IEEE Int'l Workshop Rapid System Prototyping (RSP 05), IEEE CS Press, 2005, pp. 172-178.- 9. B. Wu, J. Zhu, and F.N. Najm, "Dynamic-Range Estimation,"
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 9, 2006, pp. 1618-1636.- 10. C. Shi and R.W. Brodersen, "An Automated Floating-Point to Fixed-Point Conversion Methodology,"
Proc. IEEE Int'l Conf. Acoustics, Speech, and Signal Processing (ICASSP 03), IEEE Press, 2003, vol. 2, pp. 529-532.- 11. E. Özer, A.P. Nisbet, and D. Gregg, "A Stochastic Bitwidth Estimation Technique for Compact and Low-Power Custom Processors,"
ACM Trans. Embedded Computing Systems, vol. 7, no. 3, 2008, article 34. - 12. J. Vignes, "A Stochastic Arithmetic for Reliable Scientific Computation,"
J. Mathematics and Computers in Simulation, vol. 35, no. 3, 1993, pp. 233-261.- 13. W. Kahan,
The Improbability of Probabilistic Error Analyses for Numerical Computations, tech. report, Electrical Engineering and Computer Science (EECS) Dept. and Mathematics Dept., Univ. of California, Berkeley, 1998; http://www.cs.berkeley.edu/~wkahanimprober.pdf . - 14. G.A. Constantinides, "Perturbation Analysis for Word-Length Optimization,"
Proc. 11th Ann. IEEE Symp. Field-Programmable Custom Computing Machines (FCCM 03), IEEE CS Press, 2003, pp. 81-90.- 15. R.E. Moore,
Interval Analysis, Prentice Hall, 1966.- 16. S.M. Rump, "INTLAB—INTerval LABoratory,"
Developments in Reliable Computing, T. Csendes ed., Kluwer Academic Publishers, 1999, pp. 77-104.- 17. J. Stolfi, and L.H. de Figueiredo,
Self-Validated Numerical Methods and Applications, Monograph for 21st Brazilian Mathematics Colloquium, Nat'l Inst. of Mathematics Pure and Applied (IMPA), 1997 (in Portuguese). - 18. L.B. Jackson, "On the Interaction of Roundoff Noise and Dynamic Range in Digital Filters,"
Bell Systems Technical J., vol. 49, no. 2, 1970, pp. 159-184.- 19. G.A. Constantinides, P.Y.K. Cheung, and W. Luk, "Wordlength Optimization for Linear Digital Signal Processing,"
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 10, 2003, pp. 1432-1442.- 20. C.E. Fang, R.A. Rutenbar, and T. Chen, "Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs,"
Proc. IEEE/ACM Int'l Conf. Computer-Aided Design (ICCAD 03), IEEE CS Press, 2003, pp. 275-282.- 21. Y. Pang, K. Radecka, and Z. Zilic, "Optimization of Imprecise Circuits Represented by Taylor Series and Real-Valued Polynomials,"
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 8, 2010, pp. 1177-1190.- 22. M. Daumas and G. Melquiond, "Certification of Bounds on Expressions Involving Rounded Operators,"
ACM Trans. Mathematical Software, vol. 37, no. 1, 2010, article 2. - 23. A.B. Kinsman and N. Nicolici, "Bit-Width Allocation for Hardware Accelerators for Scientific Computing Using SAT-Modulo Theory,"
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 3, 2010, pp. 405-413.- 24. A.B. Kinsman and N. Nicolici, "Computational Bit-Width Allocation for Operations in Vector Calculus,"
Proc. IEEE Int'l Conf. Computer Design (ICCD 09), IEEE Press, 2009, pp. 433-438.- 25. P.A. Parrilo, "Semidefinite Programming Relaxations for Semialgebraic Problems,"
Mathematical Programming, series B, vol. 96, no. 2, 2003, pp. 293-320.- 26. D. Boland and G.A. Constantinides, "Automated Precision Analysis: A Polynomial Algebraic Approach,"
Proc. 18th IEEE Ann. Int'l Symp. Field-Programmable Custom Computing Machines (FCCM 10), IEEE CS Press, 2010, pp. 157-164. |