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| Frédéric Pétrot, Nicolas Fournel, Patrice Gerin, Marius Gligor, Mian-Muhammed Hamayun, Hao Shen, "On MPSoC Software Execution at the Transaction Level," IEEE Design & Test of Computers, vol. 28, no. 3, pp. 32-43, May/June, 2011. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2010.118, author = {Frédéric Pétrot and Nicolas Fournel and Patrice Gerin and Marius Gligor and Mian-Muhammed Hamayun and Hao Shen}, title = {On MPSoC Software Execution at the Transaction Level}, journal ={IEEE Design & Test of Computers}, volume = {28}, number = {3}, issn = {0740-7475}, year = {2011}, pages = {32-43}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2010.118}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - On MPSoC Software Execution at the Transaction Level IS - 3 SN - 0740-7475 SP32 EP43 EPD - 32-43 A1 - Frédéric Pétrot, A1 - Nicolas Fournel, A1 - Patrice Gerin, A1 - Marius Gligor, A1 - Mian-Muhammed Hamayun, A1 - Hao Shen, PY - 2011 KW - design and test KW - hardware-software simulation KW - MPSoC modeling KW - software simulation KW - performance estimation KW - code interpretation KW - native simulation VL - 28 JA - IEEE Design & Test of Computers ER - | |||
Editor's note:
This article presents a wide variety of techniques for realizing transaction-level models of the increasingly large-scale multiprocessor systems on chip. It describes how such models of hardware allow subsequent software integration and system performance evaluation.
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