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Issue No.03 - May/June (2011 vol.28)
pp: 10-19
Samar Abdi , Concordia University
Yonghyun Hwang , Qualcomm
Lochi Yu , Universidad de Costa Rica
Gunar Schirner , Northeastern University
Daniel D. Gajski , University of California, Irvine
<p>Editor's note:</p><p>This article suggests a methodology to validate software applications for a multicore platform by automatically generating transaction-level models from task-level specification of the applications. Software vendors developing applications for multicore platforms can leverage this methodology for early validation.</p><p align="right"><it>&#x2014;Sandeep Shukla, Virginia Tech</it></p>
design and test, embedded systems, multicore design, transaction-level modeling, TLM
Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, Daniel D. Gajski, "Automatic TLM Generation for Early Validation of Multicore Systems", IEEE Design & Test of Computers, vol.28, no. 3, pp. 10-19, May/June 2011, doi:10.1109/MDT.2010.117
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11. Y. Hwang, G. Schirner, and S. Abdi, "Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support," Proc. 3rd IFIP TC 10 Int'l Embedded Systems Symposium (IESS 09), Springer, 2009, pp. 66-76.
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