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| Shyh-Shyuan Sheu, Kuo-Hsing Cheng, Meng-Fan Chang, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Frederick T. Chen, Ming-Jinn Tsai, "Fast-Write Resistive RAM (RRAM) for Embedded Applications," IEEE Design & Test of Computers, vol. 28, no. 1, pp. 64-71, January/February, 2011. | |||
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| @article{ 10.1109/MDT.2010.96, author = {Shyh-Shyuan Sheu and Kuo-Hsing Cheng and Meng-Fan Chang and Pei-Chia Chiang and Wen-Pin Lin and Heng-Yuan Lee and Pang-Shiu Chen and Yu-Sheng Chen and Frederick T. Chen and Ming-Jinn Tsai}, title = {Fast-Write Resistive RAM (RRAM) for Embedded Applications}, journal ={IEEE Design & Test of Computers}, volume = {28}, number = {1}, issn = {0740-7475}, year = {2011}, pages = {64-71}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2010.96}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Fast-Write Resistive RAM (RRAM) for Embedded Applications IS - 1 SN - 0740-7475 SP64 EP71 EPD - 64-71 A1 - Shyh-Shyuan Sheu, A1 - Kuo-Hsing Cheng, A1 - Meng-Fan Chang, A1 - Pei-Chia Chiang, A1 - Wen-Pin Lin, A1 - Heng-Yuan Lee, A1 - Pang-Shiu Chen, A1 - Yu-Sheng Chen, A1 - Frederick T. Chen, A1 - Ming-Jinn Tsai, PY - 2011 KW - design and test KW - resistive RAM KW - multilevel KW - fast access speed KW - nonvolatile memory KW - RRAM VL - 28 JA - IEEE Design & Test of Computers ER - | |||
Editor's note:
Especially for microcontroller and mobile applications, embedded nonvolatile memory is an important technology offering to reduce power and provide local persistent storage. This article describes a new resistive RAM device with fast write operation to improve the speed of embedded nonvolatile memories.
—Leland Chang, IBM T.J. Watson Research Center
1. M.-F. Chang et al., "A 0.29V Embedded NAND-ROM in 90nm CMOS for Ultra-Low-Voltage Applications," Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 10), IEEE Press, 2010, pp. 266-267.
2. M.-F. Chang and S.-J. Shen, "A Process Variation Tolerant Embedded Split-Gate Flash Memory Using Pre-stable Current Sensing Scheme," IEEE J. Solid-State Circuits, vol. 44, no. 3, 2009, pp. 987-994.
3. H.-Y. Lee et al., "Low Power and High Speed Bipolar Switching with a Thin Reactive Ti Buffer Layer in Robust HfO2 Base RRAM," Proc. Int'l Electron Devices Meeting (IEDM 08), IEEE Press, 2008, pp. 297-300.
1. H.-R. Oh et al., "Enhanced Write Performance of a 64-Mb Phase-Change Random Access Memory," IEEE J. Solid-State Circuits, vol. 41, no. 1, 2006, pp. 122-126.
2. K.-J. Lee et al., "A 90 nm 1.8 V 512 Mb Diode-Switch PRAM with 266 MB/s Read Throughput," IEEE J. Solid-State Circuits, vol. 43, no. 1, 2008, pp. 150-162.
3. T. Kawahara et al., "2 Mb SPRAM (SPin-Transfer Torque RAM) with Bit-by-Bit Bi-directional Current Write and Parallelizing-Direction Current Read," IEEE J. Solid-State Circuits, vol. 43, no. 1, 2008, pp. 109-120.
4. R. Takemura et al., "A 32-Mb SPRAM with 2T1R Memory Cell, Localized Bi-directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme," IEEE J. Solid-State Circuits, vol. 45, no. 4, 2010, pp. 869-879.
5. S. Dietrich et al., "A Nonvolatile 2-Mbit CBRAM Memory Core Featuring Advanced Read and Program Control," IEEE J. Solid-State Circuits, vol. 42, no. 4, 2007, pp. 839-845.
6. I.G. Baek et al., "Highly Scalable Non-volatile Resistive Memory Using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses," Proc. Int'l Electron Devices Meeting (IEDM 04), IEEE Press, 2004, p. 587 //Is this article only one page? If not, what are the other pages?//.
7. A. Chen et al., "Non-volatile Resistive Switching for Advanced Memory Applications," Proc. Int'l Electron Devices Meeting (IEDM 05), IEEE Press, 2005, p. 746 //same question//.
8. D. Lee et al., "Excellent Uniformity and Reproducible Resistance Switching Characteristics of Doped Binary Metal Oxides for Non-volatile Resistance Memory Applications," Proc. Int'l Electron Devices Meeting (IEDM 06), IEEE Press, 2006, p. 797 //same question//.
9. H.-Y. Lee et al., "Low Power and High Speed Bipolar Switching with a Thin Reactive Ti Buffer Layer in Robust HfO2 Base RRAM," Proc. Int'l Electron Devices Meeting (IEDM 08), IEEE Press, 2008, pp. 297-300.
10. S.-S. Sheu et al., "A 5ns Fast Write Multi-Level Non-volatile 1 K bits RRAM Memory with Advance Write Scheme," Proc. Symp. VLSI Circuits, IEEE Press, 2009, pp. 82-83.
11. M.-F. Chang and S.-J. Shen, "A Process Variation Tolerant Embedded Split-Gate Flash Memory Using Pre-stable Current Sensing Scheme," IEEE J. Solid-State Circuits, vol. 44, no. 3, 2009, pp. 987-994.