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IEEE Design & Test of Computers
July/August 2010 (vol. 27 no. 4)
ISSN: 0740-7475
Table of Contents
Call for Papers
From the EIC
Emerging Interconnect Technologies for Gigascale Integration
Hong Li, University of California, Santa Barbara
Chuan Xu, University of California, Santa Barbara
Kaustav Banerjee, University of California, Santa Barbara
pp. 20-31
Patrick Yin Chiang, Oregon State University
Sirikarn Woracheewan, Oregon State University
Changhui Hu, Oregon State University
Lei Guo, Oregon State University
Rahul Khanna, Intel
Jay Nejedlo, Intel
Huaping Liu, Oregon State University
pp. 32-43
Alireza Nojeh, University of British Columbia
Andre Ivanov, University of British Columbia
pp. 44-53
Zheng Li, Tsinghua University
Moustafa Mohamed, University of Colorado at Boulder
Hongyu Zhou, University of Colorado at Boulder
Li Shang, University of Colorado at Boulder
Alan R. Mickelson, University of Colorado at Boulder
Dejan S. Filipovic, University of Colorado at Boulder
Dejan S. Filipovic, University of Colorado at Boulder
Manish Vachharajani, University of Colorado at Boulder
Xi Chen, University of Colorado at Boulder
Wounjhang Park, University of Colorado at Boulder
Yihe Sun, Tsinghua University
pp. 54-67
Book Reviews
Chips in 3D (HTML)
Igor Markov, University of Michigan
pp. 68-69
The Road Ahead
When is 3D 2B? (Abstract)
Andrew B. Kahng, University of California, San Diego
pp. 70-71
CEDA Currents
DATC Newsletter
Conference Reports
Conference Reports (Abstract)
Rohit Kapur, Synopsys
pp. 77
TTTC Newsletter
The Last Byte
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