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IEEE Design & Test of Computers
March/April 2010 (vol. 27 no. 2)
ISSN: 0740-7475
Table of Contents
From the EIC
Compact Variability Modeling in Scaled CMOS Design
Samar K. Saha, University of Colorado at Colorado Springs
pp. 8-16
Binjie Cheng, University of Glasgow
Daryoosh Dideban, University of Glasgow
Negin Moezi, University of Glasgow
Campbell Millar, University of Glasgow
Gareth Roy, University of Glasgow
Xingsheng Wang, University of Glasgow
Scott Roy, University of Glasgow
Asen Asenov, University of Glasgow
pp. 26-35
Colin C. McAndrew, Freescale Semiconductor
Xin Li, GlobalFoundries
Ivica Stevanović, ABB Corporate Research Center
Gennady Gildenblat, Arizona State University
pp. 36-43
Darsen D. Lu, University of California, Berkeley
Chung-Hsun Lin, IBM Thomas J. Watson Research Center
Ali M. Niknejad, University of California, Berkeley
Chenming Hu, University of California, Berkeley
pp. 44-50
Feature Article
Mohammad Tehranipoor, University of Connecticut, Storrs
Kenneth M. Butler, Texas Instruments
pp. 51-67
Perspectives
Robert Brayton, University of California, Berkeley
Jason Cong, University of California, Los Angeles
pp. 68-74
Conference Reports
Conference Reports (Abstract)
Rohit Kapur, Synopsys
pp. 75
CEDA Currents
DATC Newsletter
TTTC Newsletter
Book Reviews
The Last Byte
Sani R. Nassif, IBM Research—Austin
pp. 84-86
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