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Preventing IC Piracy Using Reconfigurable Logic Barriers
January/February 2010 (vol. 27 no. 1)
pp. 66-75
Alex Baumgarten, Microsoft
Akhilesh Tyagi, Iowa State University
Joseph Zambreno, Iowa State University

Editor's note:

Hardware metering to prevent IC piracy is a challenging and important problem. The authors propose a combinational locking scheme based on intelligent placement of the barriers throughout the design in which the objective is to maximize the effectiveness of the barriers and to minimize the overhead.

—Farinaz Koushanfar, Rice University

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Index Terms:
design and test, hardware metering, IC fabrication, IC piracy, IC security, reconfigurable-logic barriers, selection heuristics
Alex Baumgarten, Akhilesh Tyagi, Joseph Zambreno, "Preventing IC Piracy Using Reconfigurable Logic Barriers," IEEE Design & Test of Computers, vol. 27, no. 1, pp. 66-75, Jan.-Feb. 2010, doi:10.1109/MDT.2010.24
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