This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Robust On-Chip Signaling by Staggered and Twisted Bundle
September/October 2009 (vol. 26 no. 5)
pp. 92-104
Hao Yu, Berkeley Design Automation
Lei He, University of California, Los Angeles
Mau-Chung Frank Chang, University of California, Los Angeles

Existing shield insertion for multiple signal nets can lead to a nonuniformly distributed, capacitive-coupling length and inductive return paths, introducing large delays and delay variation by crosstalk. This article discusses a twisted, staggered interconnect structure that reduces both inductive and capacitive crosstalk. The proposed design reduces delay by 25% and reduces delay variation by 25× compared to designs employing coplanar shields.

1. S. Rusu et al., "The First IA-64 Microprocessor," IEEE J. Solid-State Circuits, vol. 35, no. 11, 2000, pp. 1539-1544.
2. A. Krstic et al., "Delay Testing Considering Crosstalk-Induced Effects," Proc. Int'l Test Conf. (ITC 01), IEEE CS Press, 2001, pp. 559-567.
3. A. Roy, N. Mahmoud, and M.H. Chowdhury, "Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew," Proc. 44th Design Automation Conf. (DAC 07), ACM Press, 2007, pp. 184-187.
4. J. Chen and L. He, "Worst-Case Crosstalk Noise for Nonswitching Victims in High-Speed Buses," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 8, 2005, pp. 1275-1283.
5. S.W. Tu, Y.W. Chang, and J.Y. Jou, "RLC Coupling Aware Simulation and On-Chip Bus Encoding for Delay Reduction," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, 2006, pp. 2258-2264.
6. G. Zhong, C.K. Koh, and K. Roy, "A Twisted-Bundle Layout Structure for Minimizing Inductive Coupling Noise," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design (ICCAD 00), IEEE CS Press, 2000, pp. 406-411.

Index Terms:
on-chip signaling, crosstalk reduction, shield insertion, interconnect structure, chip multiprocessors
Citation:
Hao Yu, Lei He, Mau-Chung Frank Chang, "Robust On-Chip Signaling by Staggered and Twisted Bundle," IEEE Design & Test of Computers, vol. 26, no. 5, pp. 92-104, Sept.-Oct. 2009, doi:10.1109/MDT.2009.121
Usage of this product signifies your acceptance of the Terms of Use.