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Issue No.05 - September/October (2009 vol.26)
pp: 48-62
Gordon W. Roberts , McGill University
<p>Editor's note:</p><p>This article, based on a tutorial the author presented at ITC 2008, is an overview and introduction to mixed-signal production test. The article focuses on the fundamental techniques and procedures in production test and explores key issues confronting the industry.</p><p align="right"><it>&#x2014;Nur A. Touba, University of Texas</it></p>
mixed-signal test, design and test, analog test, DFT, SerDes test, RF test, production test
Gordon W. Roberts, "Mixed-Signal Production Test: A Measurement Principle Perspective", IEEE Design & Test of Computers, vol.26, no. 5, pp. 48-62, September/October 2009, doi:10.1109/MDT.2009.117
1. J. Rivoir, "Lowering Cost of Test: Parallel Test or Low-Cost ATE?" Proc. 12th Asian Test Symp. (ATS 03), IEEE CS Press, 2003, pp. 360-365.
2. C. Taillefer and G.W. Roberts, "Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment without Increasing Test Time," Proc. Int'l Test Conf. (ITC 04), IEEE CS Press, 2004, pp. 953-962.
3. M. Mahoney, Tutorial DSP-Based Testing of Analog and Mixed-Signal Circuits, Wiley-IEEE CS Press, 1987.
4. M. Burns and G.W. Roberts, An Introduction to Mixed-Signal IC Test and Measurement, Oxford Univ. Press, 2001.
5. M. Li, Jitter, Noise, and Signal Integrity at High Speed, Prentice Hall, 2008.
6. M.P. Li et al., "A New Method for Jitter Decomposition through Its Distribution Tail Fitting," Proc. Int'l Test Conf. (ITC 99), IEEE CS Press, 1999, pp. 788-794.
7. R. Voorakaranam et al., "Signature Testing of Analog and RF Circuits: Algorithms and Methodology," IEEE Trans. Circuits and Systems I, vol. 54, no. 5, 2007, pp. 1018-1031.
8. IEEE Std. 1149.1, Test Access Port and Boundary-Scan Architecture, IEEE, 2001.
9. S. Sunter, "Mixed-Signal Testing and DFT," Advances in Electronic Testing: Challenges and Methodologies, D. Gizopoulos ed., Springer, 2006, pp. 301-336.
10. H. Noguchi et al., "A 40Gb/s CDR with Adaptive Decision-Point Control Using Eye-Opening-Monitor Feedback," Proc. Int'l Solid-State Circuits Conf. (ISSCC 08), IEEE Press, 2008, pp. 228-229.
11. B.R. Veillette, and G.W. Roberts, "Stimulus Generation for Built-In Self-Test of Charge Pump Phase-Locked Loops," Proc. Int'l Test Conf. (ITC 98), IEEE CS Press, 1998, pp. 698-707.
12. S. Sunter and A. Roy, "On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz," IEEE Design &Test, vol. 21, no. 4, 2004, pp. 314-321.
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