July/August 2009 (Vol. 26, No. 4) pp. 102-103
0740-7475/09/$31.00 © 2009 IEEE
Published by the IEEE Computer Society
Published by the IEEE Computer Society
Test Technology TC Newsletter
|Past TTTC Events|
|Upcoming TTTC Events|
|Newsletter Editor's Invitation|
PDFs Require Adobe Acrobat
Past TTTC Events
27th IEEE VLSI Test Symposium (VTS 09)
3–7 May 2009
Santa Cruz, California
The 2009 IEEE VLSI Test Symposium program included articles in various areas such as emerging trends and novel concepts in test, verification, fault and defect tolerance, and validation of microelectronic circuits and systems, analog and RF circuits, digital circuits, and memory. In addition to the papers presented at VTS'09, the innovative-practices track and special sessions were popular among researchers from both academia and industry. The keynote speech was given by John Kibarian, president and CEO of PDF Solutions, and the invited keynote was given by Bozena Kaminska (Canada Research Chair in Wireless Sensor Networks), Simon Fraser University, entitled "Testing a New Generation of Multifunctional Embedded Microsystems." Similar to last year's symposium, student poster presentation and best-doctoral-thesis contest were included in this year's program as well.
18th IEEE North Atlantic Test Workshop (NATW 09)
13–15 May 2009
Hopewell Junction, New York
The IEEE North Atlantic Test Workshop provides a forum for discussions on the latest issues relating to high-quality, economical, and efficient testing methodologies and designs. With the increasing complexity in both design and test of integrated circuits and systems, the 18th NATW featured the theme "Simple Solutions Revolutionize Test" and a panel dedicated to process variation. NATW'09 included 30 papers from seven different companies and 15 different universities, including 14 student papers competing for the Jake Karrfalt Best Student Paper Award. In addition, the workshop included a special session dedicated to solid state circuits and systems test, and an invited session on statistical timing for test of process variations. The 2009 workshop was held at Le Chambord in Hopewell Junction, N.Y., and was sponsored, in part, by the IEEE Green Mountain Section, the IEEE Circuits and Systems Society, and the IEEE Women in Engineering Committee.
Upcoming TTTC Events
2nd IEEE International Workshop on Hardware-Oriented Security and Trust (HOST 09)
27 July 2009
San Francisco, California
The emergence of a globalized, horizontal semiconductor business model raises a set of concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality. Hardware-oriented security and trust (HOST) issues span a broad range including threats related to the malicious insertion of Trojan circuits designed, for example, to act as a "kill switch" to disable a chip, to integrated circuit (IC) piracy, to attacks designed to extract encryption keys and IP from a chip, and to malicious system disruption and diversion. HOST covers security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems. The mission of HOST 2009 is to provide a forum for the presentation and discussion of research that is of critical significance to the security of, and trust in, modern society's microelectronic-supported infrastructures.
Workshop on Memory Technology, Design, and Testing (MTDT 09)
31 August–2 September 2009
MTDT 2009 will provide a forum dedicated to the recent advancements of memory technology, covering topics such as memory devices, circuit design, architecture, fabrication process, and verification. In addition, the workshop will address yield analysis testing, diagnosis, and repair for all kinds of memory such as SRAM, DRAM, flash memory, EPROM, EEPROM, embedded memories, 3D memories, content-addressable memories, and so on.
24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 09)
7–9 October 2009
DFT is an annual symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI systems including emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing—and affected by faults during system operation—are of interest.
Newsletter Editor's Invitation
I would appreciate input and suggestions about the newsletter from the test community. Please forward your ideas; contributions; and information on awards, conferences, and workshops to Mohammad Tehranipoor, Electrical and Computer Engineering Department, Univ. of Connecticut, 371 Fairfield Way, Storrs, CT 06269-2157; email@example.com.
Editor, TTTC Newsletter