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High-Level Dataflow Transformations Using Taylor Expansion Diagrams
July/August 2009 (vol. 26 no. 4)
pp. 46-57
Maciej Ciesielski, University of Massachusetts, Amherst
Jeremie Guillot, Lab-STICC, Université de Bretagne Sud, Lorient, France
Daniel Gomez-Prado, University of Massachusetts, Amherst
Emmanuel Boutillon, Lab-STICC, Université de Bretagne Sud, Lorient, France

Editor's note:

This article provides an overview of a canonical representation for arithmetic expressions and how it can be used to obtain various factorizations of such expressions to optimize them. The applicability of the approach is demonstrated in a high-level synthesis flow.

—Andres Takach, Mentor Graphics

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10. A. Hosangadi, F. Fallah, and R. Kastner, "Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination," IEEE Trans. CAD, Oct. 2005, pp. 2012-2022.

Index Terms:
high-level synthesis, design and test, dataflow graphs, symbolic algebra, Taylor expansion diagrams
Citation:
Maciej Ciesielski, Jeremie Guillot, Daniel Gomez-Prado, Emmanuel Boutillon, "High-Level Dataflow Transformations Using Taylor Expansion Diagrams," IEEE Design & Test of Computers, vol. 26, no. 4, pp. 46-57, July-Aug. 2009, doi:10.1109/MDT.2009.82
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