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Issue No.04 - July/August (2009 vol.26)
pp: 46-57
Maciej Ciesielski , University of Massachusetts, Amherst
Daniel Gomez-Prado , University of Massachusetts, Amherst
Emmanuel Boutillon , Lab-STICC, Université de Bretagne Sud, Lorient, France
ABSTRACT
<p>Editor's note:</p><p>This article provides an overview of a canonical representation for arithmetic expressions and how it can be used to obtain various factorizations of such expressions to optimize them. The applicability of the approach is demonstrated in a high-level synthesis flow.</p><p align="right">&#x2014;Andres Takach, Mentor Graphics</p>
INDEX TERMS
high-level synthesis, design and test, dataflow graphs, symbolic algebra, Taylor expansion diagrams
CITATION
Maciej Ciesielski, Daniel Gomez-Prado, Emmanuel Boutillon, "High-Level Dataflow Transformations Using Taylor Expansion Diagrams", IEEE Design & Test of Computers, vol.26, no. 4, pp. 46-57, July/August 2009, doi:10.1109/MDT.2009.82
REFERENCES
1. P. Coussy and A. Morawiec, High Level Synthesis from Algorithm to Digital Circuits, Springer, 2008.
2. M. Ciesielski, P. Kalla, and S. Askar, "Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs," IEEE Trans. Computers, vol. 55, no. 9, 2006, pp. 1188-1201.
3. "TDS-TED-based Behavioral Decomposition System"; http://www.ecs.umass.edu/ece/labs/vlsicad tds.html.
4. R. Bryant and Y. Chen, "Verification of Arithmetic Functions with Binary Moment Diagrams," Proc. Design Automation Conf. (DAC 95), ACM Press, 1995, pp. 535-541.
5. D. Gomez-Prado et al., "Optimizing Dataflow Graphs to Minimize Hardware Implementations," Proc. Design Automation and Test in Europe (DATE 09), IEEE CS Press, 2009, pp. 117-122.
6. M. Ciesielski et al., "Data-Flow Transformations Using Taylor Expansion Diagrams," Proc. Design Automation and Test in Europe (DATE 07), IEEE CS Press, 2007, pp. 455-460.
7. J. Guillot, "Optimization Techniques for High Level Synthesis and Pre-Compilation Based on Taylor Expansion Diagrams," doctoral dissertation, Lab-STICC, UniversitéBretagne Sud, 2008.
8. M. Püschel et al., "SPIRAL: Code Generation for DSP Transforms," Proc. IEEE, vol. 93, no. 2, 2005, pp. 232-275.
9. GAUT High-Level Synthesis Tool; http://www-labsticc.univ-ubs.frwww-gaut.
10. A. Hosangadi, F. Fallah, and R. Kastner, "Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination," IEEE Trans. CAD, Oct. 2005, pp. 2012-2022.
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