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Issue No.04 - July/August (2009 vol.26)
pp: 18-25
Grant Martin , Tensilica
Gary Smith , Gary Smith EDA
<p>Editor's note:</p><p>This article presents the history and evolution of HLS from research to industry adoption. The authors offer insights on why earlier attempts to gain industry adoption were not successful, why current HLS tools are finally seeing adoption, and what to expect as HLS evolves toward system-level design.</p><p align="right">&#x2014;Andres Takach, Mentor Graphics</p>
High-level synthesis, behavioral synthesis, ESL synthesis, commercial use, history, design and test
Grant Martin, Gary Smith, "High-Level Synthesis: Past, Present, and Future", IEEE Design & Test of Computers, vol.26, no. 4, pp. 18-25, July/August 2009, doi:10.1109/MDT.2009.83
1. R. Gupta and F. Brewer, "High-Level Synthesis: A Retrospective," High-Level Synthesis: From Algorithm to Digital Circuit, P. Coussy, and A. Morawiec eds., Springer, 2008, chapter 2.
2. P. Coussy, and A. Morawiec eds., High-Level Synthesis: From Algorithm to Digital Circuit, Springer, 2008.
3. A. Parker et al., "The CMU Design Automation System—An Example of Automated Data Path Design," Proc. Design Automation Conf. (DAC 79), ACM Press, pp. 73-80.
4. P.G. Paulin, and J.P. Knight, "Force-Directed Scheduling for the Behavioral Synthesis of ASICs," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 8, no. 6, 1989, pp. 661-679. According to Google Scholar, consulted 13 September 2008, this paper has been cited 648 times. Other HLS-related papers by these authors, in Proc. DAC 1986, Proc. DAC 1987, Proc. DAC 1989, and IEEE Design and Test 1989 have been cited another 462 times according to Google Scholar. A more conservative test using Microsoft China's Libra database finds 339 citations for the same set of papers.
5. D. Gajski et al., High Level Synthesis: An Introduction to Chip and System Design, Kluwer (now Springer), 1992.
6. G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.
7. R. Camposano and W. Wolf eds., High-Level VLSI Synthesis, Springer, 1991.
8. H. de Man et al., "Cathedral-II: A Silicon Compiler for Digital Signal Processing," , IEEE Design and Test, vol. 3, no. 6, 1986, pp. 13-25.
9. D. Knapp, Behavioral Synthesis: Digital System Design Using the Synopsys Behavioral Compiler, Prentice Hall, 1996.
10. J.P. Elliott, Understanding Behavioral Synthesis: A Practical Guide to High-Level Design, Kluwer (now Springer), 1999.
11. L. Pozzi, M. Vuletic, and P. Ienne, "Automatic Topology-Based Identification of Instruction-Set Extensions for Embedded Processors," Proc. Design, Automation, and Test in Europe (DATE 02), IEEE CS Press, 2002, p. 1138.
12. D. Goodwin and D. Petkov, "Automatic Generation of Application Specific Processors," Proc. Int'l Conf. Compilers, Architecture, and Synthesis for Embedded Systems (CASES 03), ACM Press, 2003, pp. 137-147.
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