This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Low-Power Design Solutions for Wireless Multimedia SoCs
March/April 2009 (vol. 26 no. 2)
pp. 20-29
Jean-Pierre Schoellkopf, STMicroelectronics, Crolles, France
Philippe Magarshack, STMicroelectronics, Crolles, France

Editor's note:

With advanced semiconductor technology nodes, power management has become a global problem. In battery powered applications, this problem is even more critical. This article describes a range of design solutions that ST Microelectronics uses to manage dynamic and static power while meeting its targets for area and performance.

—Yervant Zorian, Virage Logic

1. J. Kawa, "Low Power and Power Management for CMOS—An EDA Perspective," IEEE Trans. Electron Devices, vol. 55, no. 1, 2008, pp. 186-196.
2. W.H. Cheng and B.M. Baas, "Dynamic Voltage and Frequency Scaling Circuits with Two Supply Voltages," Proc. IEEE Int'l Symp. Circuits and Systems (ISCAS 08), IEEE Press, 2008, pp. 1236-1239.
3. S. Barasinski, L. Camus, and S. Clerc, "A 45nm Single Power Supply SRAM Supporting Low Voltage Operation Down to 0.6V," Proc. IEEE European Solid-State Circuits Conf. (ESSCIRC 08), IEEE Press, 2008, pp. 520-505.
4. A. Valentian and E. Beigne, "Gate Bias Circuit for an SCCMOS Power Switch Achieving Maximum Leakage Reduction," Proc. IEEE European Solid-State Circuits Conf. (ESSCIRC 07), IEEE Press, pp. 300-303.
5. D. Flynn et al., "IEM926: An Energy Efficient SoC with Dynamic Voltage Scaling, Proc. DATE, IEEE Press, 2004; see http://www2.computer.org/portal/web/csdl/ doi/10.1109DATE.2004.1269261.
6. A.B. Kahng, "DFM Tutorial," Proc. 43rd Design Automation Conf. (DAC 06), ACM Press, 2006; http://vlsicad.ucsd. edu/Presentations/DAC06TUTORIAL DAC06-DFMTutorial-Part5-Kahng-FINALPOSTED.pdf .
7. T. Austin et al., "Reliable Systems on Unreliable Fabrics," IEEE Design &Test, vol. 25, no. 4, 2008, pp. 322-332.
8. J. Kwong et al., "A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter," IEEE J. Solid-State Circuits, vol. 44, no. 1, pp. 115-126.
9. B. Zhai et al., "A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency," Proc. Symp. VLSI Circuits, IEEE Press, 2006, pp. 154-155.
10. M. Lysinger et al., "A Radiation Hardened Nano-power 8Mb SRAM in 130nm CMOS," Proc. 9th Int'l Symp. Quality Electronic Design (ISQED 08), IEEE CS Press, 2008, pp. 23-29.

Index Terms:
Low power, power management, process compensation, low leakage, voltage scaling
Citation:
Jean-Pierre Schoellkopf, Philippe Magarshack, "Low-Power Design Solutions for Wireless Multimedia SoCs," IEEE Design & Test of Computers, vol. 26, no. 2, pp. 20-29, March-April 2009, doi:10.1109/MDT.2009.39
Usage of this product signifies your acceptance of the Terms of Use.