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Issue No.01 - January/February (2009 vol.26)
pp: 88-93
Gadi Singer , Intel
Mike Tripp , Intel
Gadi Singer, Intel, computing trends, nanoscale device integration, gigascale complexity, test
Gadi Singer, Rajesh Galivanche, Srinivas Patil, Mike Tripp, "The Challenges of Nanotechnology and Gigacomplexity", IEEE Design & Test of Computers, vol.26, no. 1, pp. 88-93, January/February 2009, doi:10.1109/MDT.2009.20
1. H.H. Goldstine and A. Goldstine, "The Electronic Numerical Integrator and Computer," IEEE Annals of the History of Computing, vol. 18, no. 1, Spring 1996, pp. 10-16.
2. "Introducing the 45-nm Next-Generation Intel Core Microarchitecture," white paper, Intel, Nov. 2007, http://
3. G. Gerosa et al., "A Sub-1W to 2W Low-Power IA Processor for Mobile Internet Devices and Ultra-Mobile PCs in 45 nm Hi-K Metal Gate CMOS," Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 08), IEEE Press, 2008, pp. 256-257, 611.
4. S. Tyagi et al., "A 130 nm Generation Logic Technology Featuring 70 nm Transistors, Dual Vt Transistors and 6 Layers of Cu Interconnects," Proc. Int'l Electron Devices Meeting (IEDM 00), IEEE Press, 2000, pp. 567-570.
5. S. Thompson et al., "A 90 nm Logic Technology Featuring 50 nm Strained Silicon Channel Transistors, 7 Layers of Cu Interconnects, Low k ILD, and 1 um2SRAM Cell," Proc. Int'l Electron Devices Meeting (IEDM 02), IEEE Press, 2002, pp. 61-64.
6. K. Mistry et al., "A 45 nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193 nm Dry Patterning, and 100% Pb-free Packaging," Proc. Int'l Electron Devices Meeting (IEDM 07), IEEE Press, 2007, pp. 243-246.
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