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Issue No.01 - January/February (2009 vol.26)
pp: 44-51
Stylianos Diamantidis , Globetech Solutions
Iraklis Diamantidis , Globetech Solutions
ABSTRACT
This article describes the test wrapper implementation of a popular embedded microprocessor, along with an automated approach for verifying the wrapper's compliance to the standard.
INDEX TERMS
ARM Cortex-A8 microprocessor, test, IEEE Std 1500, wrapper, compliance, verification
CITATION
Teresa McLaurin, Stylianos Diamantidis, Iraklis Diamantidis, "The ARM Cortex-A8 Microprocessor IEEE Std 1500 Wrapper", IEEE Design & Test of Computers, vol.26, no. 1, pp. 44-51, January/February 2009, doi:10.1109/MDT.2009.19
REFERENCES
1. T. McLaurin and R. Kapur, "Wrap Your Cores to Enable SOC Test," EE Times,24 Nov. 2004, http://www.design-reuse.com/articles/9228/ wrap-your-cores-to-enable-soc-test-arm-synopsys.html.
2. IEEE Std. 1500-2005, IEEE Standard Testability Method for Embedded Core-Based Integrated Circuits, IEEE, 2005.
3. F. da Silva, T. McLaurin, and T. Waayers, The Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500, Springer, 2006.
4. IEEE Std. 1450.6-2005, IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data-Core Test Language (CTL), IEEE, 2006.
5. I. Diamantidis, T. Oikonomou, and S. Diamantidis, "Towards an IEEE P1500 Verification Infrastructure: A Comprehensive Approach," Proc. 3rd IEEE Int'l Workshop Infrastructure IP (I-IP 05), IEEE Press, 2005, pp. 25-30.
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