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| Sachin Sapatnekar, "Building your yield of dreams," IEEE Design & Test of Computers, vol. 25, no. 2, pp. 194-195, March-April, 2008. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2008.31, author = {Sachin Sapatnekar}, title = {Building your yield of dreams}, journal ={IEEE Design & Test of Computers}, volume = {25}, number = {2}, issn = {0740-7475}, year = {2008}, pages = {194-195}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2008.31}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Building your yield of dreams IS - 2 SN - 0740-7475 SP194 EP195 EPD - 194-195 A1 - Sachin Sapatnekar, PY - 2008 KW - design for manufacturability KW - DFM KW - yield KW - nanoscale KW - CMOS KW - modeling variations VL - 25 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2008.31
This is a review of Design for Manufacturability and Yield for Nano-Scale CMOS (by Charles Chiang and Jamil Kawa). DFM is a rapidly growing field that uses design techniques to improve manufacturing yield. However, the dilution in the interface between design and manufacturing implies that today, to build a circuit with enhanced yield, a designer must know more about manufacturing than ever before. The first step to embracing yield considerations is to learn about them, and this book portrays the landscape of this area in an excellent way. It describes methods for modeling variations, optimizing them, and learning to design around them when they occur. The overall structure of this book is well thought out and logical, and the reader who peruses it will be rewarded with an excellent view of the field.
Index Terms:
design for manufacturability, DFM, yield, nanoscale, CMOS, modeling variations
Citation:
Sachin Sapatnekar, "Building your yield of dreams," IEEE Design & Test of Computers, vol. 25, no. 2, pp. 194-195, March-April 2008, doi:10.1109/MDT.2008.31
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