This Article 
 Bibliographic References 
 Add to: 
An Illustrated Methodology for Analysis of Error Tolerance
March-April 2008 (vol. 25 no. 2)
pp. 168-177
Melvin A. Breuer, University of Southern California
Haiyang (Henry) Zhu, Analog Devices
Error tolerance deals with the use of defective circuitry that occasionally produces errors, yet provides acceptable performance to users when executing certain applications. Although this concept may seem unappealing, it has been used for some time in several digital systems associated with multimedia signals, such as sound and images. The motivation for using such devices is the related increase in effective yield, and hence lower-cost parts. This article presents a methodology for the analysis of the applicability of error tolerance. The methodology is illustrated with respect to a digital telephone-answering device, but is applicable to a broad class of systems. Key components of this methodology include defining acceptable yet imperfect behavior, determining if a large class of realistic defects in a subsystem provide acceptable behavior at the system level, and determining how to recognize (test) whether a defective subsystem will provide acceptable system performance.

1. H.H. Kuok, Audio Recording Apparatus Using an Imperfect Memory Circuit, US patent 5,414,758, Patent and Trademark Office, 1995, http://freepatentsonline.com5414758.html .
2. P.V. Argade, Digital Secretary, US patent 5,651,055, Patent and Trademark Office, 1997, http://freepatentsonline.com5651055.html .
3. PCD6001 Digital Telephone Answering Machine Chip, Philips Semiconductors, 2001, datasheetsPCD60012.pdf.
4. 56800E 16-Bit Digital Signal Controllers, Freescale Semiconductor, 2005, DSP56853.pdf.
5. Recommendation ITU-T G.723.1, Speech Coders: Dual Rate Speech Coder for Multimedia Communications Transmitting at 5.3 and 6.3 Kbit/s, Int'l Telecommunications Union, 1996.
6. Details to Assist in Implementation of Federal Standard 1016 CELP, National Communications System, 1992.
7. Recommendation ITU-T P.800, Methods for Subjective Determination of Transmission Quality, Int'l Telecommunications Union, 1996.
8. Recommendation ITU-T P.830, Subjective Performance Assessment of Telephone Band and Wideband Digital Codecs, Int'l Telecommunications Union, 1996.
9. Recommendation ITU-T P.862, Perceptual Evaluation of Speech Quality (PESQ): An Objective Method for End-to-End Speech Quality Assessment of Narrow-Band Telephone Networks and Speech Codecs, Int'l Telecommunications Union, 2001.
10. A.J. van de Goor, Testing Semiconductor Memories, Theory and Practice, ComTex Publishing, 1998.
11. Z. Jiang and S.K. Gupta, "An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes," Proc. Int'l. Test Conf. (ITC 02), IEEE CS Press, 2002, pp. 824-833.
12. Z.J. Chen et al., Filtering of Defective Picture Elements in Digital Images, European Patent EP1045578, to Texas Instruments, 2003, .
1. International Technology Roadmap for Semiconductors, 2006 update, .
2. M.A. Breuer, S.K. Gupta, and T.M. Mak, "Defect and Error Tolerance in the Presence of Massive Numbers of Defects," IEEE Design &Test, vol. 21, no. 3, May–June 2004, pp. 216-227.
3. Z. Pan and M.A. Breuer, "Estimating Error-Rate in Defective Logic Using Signature Analysis," IEEE Trans. Computers, vol. 56, no. 5, May 2007, pp. 650-661.
4. K.J. Lee, T.Y. Hsieh, and M.A. Breuer, "A Novel Test Methodology Based on Error-Rate to Support Error-Tolerance," Proc. IEEE Int'l Test Conf. (ITC 05), IEEE Press, 2005, paper 44.3 (9 pp.)
5. T.Y. Hsieh, K.J. Lee, and M.A. Breuer, "An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance," Proc. 24th IEEE VLSI Test Symp. (VTS 06), IEEE CS Press, 2006, pp. 130-135.
6. H. Kakavand and A. El Gamal, "On Energy-Reliability Tradeoff in Analog-to-Digital Converters with Imperfect Comparators," Proc. 40th Ann. Conf. Information Sciences and Systems (CISS 06), pp. 1366-1371, 297.pdf.
7. I.S. Chong and A. Ortega, "Hardware Testing for Error Tolerant Multimedia Compression Based on Linear Transforms," Proc. 20th IEEE Int'l Symp. Defect and Fault Tolerance in VLSI Systems (DFT 05), IEEE CS Press, 2005, pp. 523-534.
8. H. Chung and A. Ortega, "Analysis and Testing for Error Tolerant Motion Estimation," Proc. 20th IEEE Int'l Symp. Defect and Fault Tolerance in VLSI Systems (DFT 05), IEEE CS Press, 2005, pp. 514-522.
9. K.V. Palem, "Energy Aware Computing through Probabilistic Switching: A Study of Limits," IEEE Trans. Computers, vol. 54, no. 9, Sept. 2005, pp. 1123-1137.
10. B.J. MacLennan, "Natural Computation and Non-Turing Models of Computation," Theoretical Computer Science, vol. 317, no. 1–3, 4 June 2004, pp. 115-145.
11. M.R. Stan et al., "Molecular Electronics: From Devices and Interconnect to Circuits and Architecture," Proc. IEEE, vol. 91, no. 11, Nov. 2003, pp. 1940-1957.

Index Terms:
error tolerance, telephone answering machine, yield, defective flash memory, mean opinion score
Melvin A. Breuer, Haiyang (Henry) Zhu, "An Illustrated Methodology for Analysis of Error Tolerance," IEEE Design & Test of Computers, vol. 25, no. 2, pp. 168-177, March-April 2008, doi:10.1109/MDT.2008.30
Usage of this product signifies your acceptance of the Terms of Use.