The Community for Technology Leaders
RSS Icon
Issue No.01 - January-February (2008 vol.25)
pp: 18-28
Changwook Yoon , Korea Advanced Institute of Science and Technology
Junwoo Lee , Hynix Semiconductor
Young-Jin Park , Korea Electrotechnology Research Institute
Hyunjeong Park , Korea Advanced Institute of Science and Technology
Jaemin Kim , Korea Advanced Institute of Science and Technology
Jun So Pak , Korea Advanced Institute of Science and Technology
Joungho Kim , Korea Advanced Institute of Science and Technology
This article introduces a low-noise ultrawideband transceiver system-in-package design for a compact implementation in a small mobile platform. In the designed UWB transceiver SiP, the transmitter chip has a fully digital circuit implementation with a band-pass filter, and the receiver chip has a noncoherent architecture. To reduce noise generation and coupling in the densely integrated SiP design, the authors considered signal integrity issues at the high-frequency channel, and power integrity issues at the power distribution network in the SiP substrate. To ensure signal integrity, the authors minimized reflection loss at the high frequency channel through a balanced impedance-matching technique. To secure power integrity, they carefully managed cavity resonance frequencies and the split plane when designing the power-ground plane of the SiP substrate. They have successfully demonstrated 100 Mbps wireless data transmission using the proposed UWB transceiver SiP with a power consumption of 30.4 mW.
UWB, SiP, transceiver, low noise, signal integrity, power integrity
Changwook Yoon, Junwoo Lee, Young-Jin Park, Hyunjeong Park, Jaemin Kim, Jun So Pak, Joungho Kim, "Design of a Low-Noise UWB Transceiver SiP", IEEE Design & Test of Computers, vol.25, no. 1, pp. 18-28, January-February 2008, doi:10.1109/MDT.2008.9
1. Federal Communications Commission (FCC), Revision of Part 15 of the Commission's Rules Regarding Ultra-Wideband Transmission Systems, First Report and Order, ET Docket 98-153, FCC 02-48, 2002; Orders/2002fcc02048.pdf.
2. R.R. Tummala, "SOP: What Is It and Why? A New Microsystem-Integration Technology Paradigm-Moore's Law for System Integration of Miniaturized Convergent Systems of the Next Decade," IEEE Trans. Advanced Packaging, vol. 27, no. 2, May 2004, pp. 241—249.
3. R.R. Tummala and V.K. Madisetti, "System on Chip or System on Package?," IEEE Design &Test, vol. 16, no. 2, Apr.—June 1999, pp. 48—56.
4. J. Lee et al., "System-on-Package Ultra-Wideband Transmitter Using CMOS Impulse Generator," IEEE Trans. Microwave Theory and Techniques, vol. 54, no. 4, part 2, 2006, pp. 1667—1674.
5. M. Kim et al., "System on Package Ultra Wideband Transmitter with Integrated Band-Pass Filter and Broad Band Planar Antenna," Proc. 55th Electronic Components and Technology Conf., IEEE Press, 2005, pp. 541—544.
6. C. Yoon et al., "Design of LTCC-Based Ultra-Wideband Transmitter SiP Using CMOS Impulse Generator," Proc. 8th Electronic Packaging Technology Conf. (EPTC 06), 2006, pp. 85—89.
7. S. Tiuraniemi et al., "Front-End Receiver for Low Power, Low Complexity Non-Coherent UWB Communications System," IEEE Int'l Conf. Ultra-Wideband (ICU 05), IEEE Press, 2005, pp. 339—343.
8. E. Bogatin, Signal Integrity-Simplified, Prentice Hall PTR, 2003.
9. D.G. Kam et al., "Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array," IEEE Design &Test, vol. 23, no. 3, May—June 2006, pp. 212—219.
10. J.S. Pak et al., "Modeling and Measurement of Radiated Field Emission from a Power/Ground Plane Cavity Edge Excited by a Through-Hole Signal Via Based on a Balanced TLM and Via Coupling Model," IEEE Trans. Advanced Packaging, vol. 30, no. 1, Feb. 2007, pp. 73—85.
11. J. Park et al., "Noise Coupling to Signal Trace and Via from Power/Ground Simultaneous Switching Noise in High Speed Double Data Rates Memory Module," Proc. Int'l Symp. Electromagnetic Compatibility (EMC 04), IEEE Press, vol. 2, 2004, pp. 592—597.
12. Y. Jeong et al., "Analysis of Noise Isolation Methods on Split Power/Ground Plane of Multi-Layered Package and PCB for Low Jitter Mixed Mode System," Electrical Performance of Electronic Packaging, IEEE Press, 2003, pp. 199—202.
7 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool