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Security in SRAM FPGAs
November-December 2007 (vol. 24 no. 6)
pp. 581
Steve Trimberger, Xilinx Research Labs
This sidebar discusses bitstream security for FPGAs. As FPGAs have grown larger and more complex, the value of the IP implemented in them has grown commensurately. FPGA manufacturers have added security features to protect designs from unauthorized copy, theft, and reverse-engineering as the bitstream is transmitted from permanent storage into the FPGA. These bitstream security features use well-known information security methods to protect design data. Bitstream encryption exists primarily to prevent unauthorized copy, but it also thwarts reverse-engineering and provides trust assurance by limiting execution of a design to only those FPGAs containing the proper key.
Index Terms:
bitstream, encryption, security, FPGAs, reverse-engineering
Citation:
Steve Trimberger, "Security in SRAM FPGAs," IEEE Design & Test of Computers, vol. 24, no. 6, pp. 581, Nov.-Dec. 2007, doi:10.1109/MDT.2007.203
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