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Issue No.06 - November/December (2006 vol.23)
pp: 476-483
ABSTRACT
With each successive technology generation, process and environmental variations consume an increasingly large portion of the design envelope. To mitigate the impact of these variations, designs can incorporate adaptive techniques to reduce the impact. At the core of adaptability is the fundamental idea that each piece of silicon is different and will respond differently to stimuli. This poses a significant challenge in testing the product because testing relies on all parts behaving in a predictable manner every time they are tested. This article details adaptive techniques used on a dual-core, 90-nm Itanium microprocessor, and the issues and limitations encountered when testing this design.
INDEX TERMS
dual core, Itanium microprocessor, Montecito, adaptive circuits, process variation, power measurement, cache safe technology, active clock deskew
CITATION
Eric S. Fetzer, "Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design", IEEE Design & Test of Computers, vol.23, no. 6, pp. 476-483, November/December 2006, doi:10.1109/MDT.2006.159
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