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November/December 2006 (vol. 23 no. 6)
pp. 434
With increased technology scaling, high variability and low reliability will likely be the main challenges for chip design and testing. This issue discusses some of the key issues for handling increasing variations and uncertainties. Also, D&T's plans for 2007 special themes have been finalized.
Index Terms:
statistical design, test process, variation, reliability
Citation:
Tim Cheng, "Handling variations and uncertainties," IEEE Design & Test of Computers, vol. 23, no. 6, pp. 434, Nov.-Dec. 2006, doi:10.1109/MDT.2006.148
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