• "the development of product architectures and specifications, including the incorporation and configuration of IP,"
• "the mapping of applications to a product specification, including hardware/software partitioning and processor optimization,"
• "the creation of pre-silicon, virtual hardware platforms for software development,"
• "the determination/automation of a hardware implementation for that architecture," and
• "the development of reference models for verifying the hardware."
• What is ESL design, and what are the current languages that support ESL features?
• What tool chains and design flows are appropriate for ESL-based design and validation?
• What new validation techniques and methodologies are available if ESL abstractions are used in a design flow? Are there any test technology benefits?
• Are there major industrial projects today that have been successful due to ESL usage?
• What are the market indicators and forces that might make or break ESL design?
Sandeep K. Shukla is an assistant professor of computer engineering at Virginia Tech. He is also founder and deputy director of the Center for Embedded Systems for Critical Applications (CESCA), and he directs the Fermat (Formal Engineering Research with Models, Abstractions, and Transformations) research lab. His research interests include design automation for embedded-systems design, especially system-level design languages, formal methods, formal specification languages, probabilistic modeling and model checking, dynamic power management, application of stochastic models and model analysis tools for defect-tolerant system design, and reliability measurement of defect-tolerant systems. Shukla has a PhD in computer science from the State University of New York (SUNY) at Albany. He has been elected as a College of Engineering Faculty Fellow at Virginia Tech, and he is on the editorial board of IEEE Design & Test.
Carl Pixley is group director at Synopsys. His pioneering achievements include model checking based on binary decision diagrams (BDDs), Boolean equivalence, alignability equivalence, constraint-based verification, and C-to-RTL verification. Pixley has a PhD in mathematics from SUNY at Binghamton. He is a member of the IEEE and the Mathematics Association of America, and is verification editor for IEEE Design & Test.
Gary Smith is a chief analyst at Gartner Dataquest, where he is part of the Design & Engineering Group and serves in the Electronic Design Automation Worldwide program. His research interests include design methodologies, ASICs, and IC design. Smith has a BS in engineering from the United States Naval Academy in Annapolis, Maryland. He is a member of the Design Technology Working Group for the International Technology Roadmap for Semiconductors (ITRS).