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A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs
May/June 2006 (vol. 23 no. 3)
pp. 234-243
Vincent Kerz?rho, Philips Semiconductors and LIRMM
Philippe Cauvet, Philips Semiconductors
Editor's note: Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing.
Index Terms:
ADC, DAC, mixed-signal testing, DFT, SiP, system-in-package
Citation:
Vincent Kerz?rho, Philippe Cauvet, Serge Bernard, Florence Aza?, Mariane Comte, Michel Renovell, "A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs," IEEE Design & Test of Computers, vol. 23, no. 3, pp. 234-243, May-June 2006, doi:10.1109/MDT.2006.59
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