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Issue No.03 - May/June (2006 vol.23)
pp: 212-219
Dong Gun Kam , Korea Advanced Institute of Science and Technology
Joungho Kim , Korea Advanced Institute of Science and Technology
Jiheon Yu , Amkor Technology Korea
Ho Choi , Amkor Technology Korea
Kicheol Bae , Amkor Technology Korea
Choonheung Lee , Amkor Technology Korea
ABSTRACT
Editor's note: System-in-package provides highly integrated packaging with high-speed performance. Many SiP packages contain low-cost 3D stacked chips interconnected by fine wire bonds. In a high-frequency spectrum, these wire bonds can cause discontinuities causing signal degradation. This article addresses problems with wire-bonding in high-frequency SiP packages and proposes design methodologies to reduce these discontinuities.
INDEX TERMS
wire bonded plastic ball grid array, WB-PBGA, 40 Gb/s Serial Link, chip-to-chip serial link, SiP, System-in-Package
CITATION
Dong Gun Kam, Joungho Kim, Jiheon Yu, Ho Choi, Kicheol Bae, Choonheung Lee, "Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array", IEEE Design & Test of Computers, vol.23, no. 3, pp. 212-219, May/June 2006, doi:10.1109/MDT.2006.78
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