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Chip-Package Codesign Flow for Mixed-Signal SiP Designs
May/June 2006 (vol. 23 no. 3)
pp. 196-202
Thomas Brandtner, Infineon Technologies
Editor's note: Design engineers are challenged with two separate entities: the chip and package designs. Because system in package integrates multiple dies into a package, design engineers should have a tool to easily combine the two entities. This article demonstrates a seven-die SiP design that implements a chip-and-package codesign platform using available EDA tools.
Index Terms:
Mixed-Signal System-in-Package design, SiP
Citation:
Thomas Brandtner, "Chip-Package Codesign Flow for Mixed-Signal SiP Designs," IEEE Design & Test of Computers, vol. 23, no. 3, pp. 196-202, May-June 2006, doi:10.1109/MDT.2006.65
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