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May/June 2006 (vol. 23 no. 3)
pp. 186-187
| ASCII Text | x | ||
| Bruce C. Kim, Yervant Zorian, "Guest Editors' Introduction: Big Innovations in Small Packages," IEEE Design & Test of Computers, vol. 23, no. 3, pp. 186-187, May/June, 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2006.69, author = {Bruce C. Kim and Yervant Zorian}, title = {Guest Editors' Introduction: Big Innovations in Small Packages}, journal ={IEEE Design & Test of Computers}, volume = {23}, number = {3}, issn = {0740-7475}, year = {2006}, pages = {186-187}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2006.69}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Guest Editors' Introduction: Big Innovations in Small Packages IS - 3 SN - 0740-7475 SP186 EP187 EPD - 186-187 A1 - Bruce C. Kim, A1 - Yervant Zorian, PY - 2006 KW - System in package KW - SiP VL - 23 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.69
Conventional single-die microelectronic packages on a printed circuit board have been with us for a long time. These electronic packages provide a means of interconnecting, powering, cooling, and protecting integrated circuit chips. Today, system-in-package (SiP) provides a variety of packaging requirements for computer, consumer, aerospace, military, and medical electronic applications by stacking individual IC chips to form 3D circuits. This packaging technology offers reduced form factor to enhance high performance and reliability. The guest editors discuss some of the obstacles SiP technology must overcome for wider use and how this special issue addresses those obstacles.
Index Terms:
System in package, SiP
Citation:
Bruce C. Kim, Yervant Zorian, "Guest Editors' Introduction: Big Innovations in Small Packages," IEEE Design & Test of Computers, vol. 23, no. 3, pp. 186-187, May-June 2006, doi:10.1109/MDT.2006.69
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