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March/April 2006 (vol. 23 no. 2)
pp. 160-161
Brian Bailey, Brian Bailey Consulting
A review of the book, "Verification Methodology Manual for SystemVerilog," by Janick Bergeron et al.
Index Terms:
verification, formal verification, SystemVerilog, design reuse, testbench
Citation:
Brian Bailey, "Was it worth the wait? Yes!," IEEE Design & Test of Computers, vol. 23, no. 2, pp. 160-161, March-April 2006, doi:10.1109/MDT.2006.56
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