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| Vladimir Hahanov, "2005 IEEE East-West Design and Test Workshop," IEEE Design & Test of Computers, vol. 22, no. 6, pp. 600, November/December, 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2005.124, author = {Vladimir Hahanov}, title = {2005 IEEE East-West Design and Test Workshop}, journal ={IEEE Design & Test of Computers}, volume = {22}, number = {6}, issn = {0740-7475}, year = {2005}, pages = {600}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.124}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - 2005 IEEE East-West Design and Test Workshop IS - 6 SN - 0740-7475 SP EP EPD - 600 A1 - Vladimir Hahanov, PY - 2005 KW - EWDTW 2005 KW - BIST KW - EDA KW - debug KW - fault diagnosis KW - system-level modeling KW - formal verification VL - 22 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.124
The 3rd IEEE East-West Design and Test Workshop (EWDTW 2005) took place from 15 to 19 September in Odessa, Ukraine. The workshop's goal was for scientific schools and experts in Eastern and Western Europe (as well as other parts of the world) to exchange experiences in the design and test of electronic systems. Researchers from western countries presented an overview of design-and-test trends. Andr? Ivanov gave a tutorial on network-on-chip design and test, and Yervant Zorian gave a tutorial on design for yield and reliability. Participants from Intel presented the invited talk, "Research at Intel's Strategic CAD Labs," which gave an overview of CAD research preformed at Intel's laboratories.
Index Terms:
EWDTW 2005, BIST, EDA, debug, fault diagnosis, system-level modeling, formal verification
Citation:
Vladimir Hahanov, "2005 IEEE East-West Design and Test Workshop," IEEE Design & Test of Computers, vol. 22, no. 6, pp. 600, Nov.-Dec. 2005, doi:10.1109/MDT.2005.124
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