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Demystifying 3D ICs: The Pros and Cons of Going Vertical
November/December 2005 (vol. 22 no. 6)
pp. 498-510
| ASCII Text | x | ||
| W. Rhett Davis, John Wilson, Stephen Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael Steer, Paul D. Franzon, "Demystifying 3D ICs: The Pros and Cons of Going Vertical," IEEE Design & Test of Computers, vol. 22, no. 6, pp. 498-510, November/December, 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.2005.136, author = {W. Rhett Davis and John Wilson and Stephen Mick and Jian Xu and Hao Hua and Christopher Mineo and Ambarish M. Sule and Michael Steer and Paul D. Franzon}, title = {Demystifying 3D ICs: The Pros and Cons of Going Vertical}, journal ={IEEE Design & Test of Computers}, volume = {22}, number = {6}, issn = {0740-7475}, year = {2005}, pages = {498-510}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.136}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Demystifying 3D ICs: The Pros and Cons of Going Vertical IS - 6 SN - 0740-7475 SP498 EP510 EPD - 498-510 A1 - W. Rhett Davis, A1 - John Wilson, A1 - Stephen Mick, A1 - Jian Xu, A1 - Hao Hua, A1 - Christopher Mineo, A1 - Ambarish M. Sule, A1 - Michael Steer, A1 - Paul D. Franzon, PY - 2005 KW - Parallel I/O KW - I/O and Data Communications KW - Transmitters KW - Receivers KW - C.0.e System architectures KW - integration and modeling KW - Interconnection architectures KW - Placement and routing KW - Routing and layout VL - 22 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.136
As 3D technologies become technologically viable, there is increasinginterest in determining the achievable payoff. This article first presents an overview of 3D technologies and introduces the motivation for moving from 2D to 3D. It then presents a case study of a fast-Fourier-transform design to illustrate the advantages of going to the third dimension.
Index Terms:
Parallel I/O, I/O and Data Communications , Transmitters, Receivers, C.0.e System architectures, integration and modeling, Interconnection architectures, Placement and routing, Routing and layout
Citation:
W. Rhett Davis, John Wilson, Stephen Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael Steer, Paul D. Franzon, "Demystifying 3D ICs: The Pros and Cons of Going Vertical," IEEE Design & Test of Computers, vol. 22, no. 6, pp. 498-510, Nov.-Dec. 2005, doi:10.1109/MDT.2005.136
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