Issue No.05 - September/October (2005 vol.22)
Res Saleh , Natural Sciences and Engineering Research Council of Canada, PMC-Sierra Inc., and University of British Columbia
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.101
New structured communication fabrics, called networks on chips (NoCs), have emerged for use in SoC designs. The basic concept is to communicate across the chip in the same way that messages are transmitted over the internet today. That is, put a packet-switching network on the chip and send messages back and forth between blocks. Designers have already resolved most of the issues in the Internet domain, so it's just a matter of bringing that knowledge to the chip. Of course, NoC is not a panacea. It does seem appropriate for the multiprocessor SoC platforms that are homogeneous in nature, but the jury is still out on the value of NoC for chips with heterogeneous IP blocks.
networks on chips, Moore's law, SoC design, interconnect delay, IP blocks
Res Saleh, "An approach that will NoC your SoCs off!", IEEE Design & Test of Computers, vol.22, no. 5, pp. 488, September/October 2005, doi:10.1109/MDT.2005.101