The Community for Technology Leaders
RSS Icon
Subscribe
Issue No.05 - September/October (2005 vol.22)
pp: 399-403
Andr? Ivanov , University of British Columbia
Giovanni De Micheli , Ecole Polytechnique Federale de Lausanne
ABSTRACT
The network-on-chip paradigm is an emerging paradigm that effectively addresses and presumably can overcome the many on-chip interconnection and communication challenges that already exist in today's chips or will likely occur in future chips. <p>Effective on-chip implementation of network-based interconnect paradigms requires developing and deploying a whole new set of infrastructure IPs and supporting tools and methodologies. This special issue illustrates how, to date, engineers have successfully deployed NoCs to meet certain very-aggressive specifications. At the same time, the articles reveal many issues and challenges that require solutions if the NoC paradigm will indeed become a panacea or quasi-panacea for tomorrow?s SoCs.</p>
INDEX TERMS
networks on chips, multiprocessor SoCs, on-chip interconnection network, on-chip communication, micronetworks, infrastructure IP
CITATION
Andr? Ivanov, Giovanni De Micheli, "Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research", IEEE Design & Test of Computers, vol.22, no. 5, pp. 399-403, September/October 2005, doi:10.1109/MDT.2005.111
27 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool