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September/October 2005 (vol. 22 no. 5)
pp. 399-403
Andr? Ivanov, University of British Columbia
Giovanni De Micheli, Ecole Polytechnique Federale de Lausanne
The network-on-chip paradigm is an emerging paradigm that effectively addresses and presumably can overcome the many on-chip interconnection and communication challenges that already exist in today's chips or will likely occur in future chips.

Effective on-chip implementation of network-based interconnect paradigms requires developing and deploying a whole new set of infrastructure IPs and supporting tools and methodologies. This special issue illustrates how, to date, engineers have successfully deployed NoCs to meet certain very-aggressive specifications. At the same time, the articles reveal many issues and challenges that require solutions if the NoC paradigm will indeed become a panacea or quasi-panacea for tomorrow?s SoCs.

Index Terms:
networks on chips, multiprocessor SoCs, on-chip interconnection network, on-chip communication, micronetworks, infrastructure IP
Citation:
Andr? Ivanov, Giovanni De Micheli, "Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research," IEEE Design & Test of Computers, vol. 22, no. 5, pp. 399-403, Sept.-Oct. 2005, doi:10.1109/MDT.2005.111
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