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New test paradigms for yield and manufacturability
May/June 2005 (vol. 22 no. 3)
pp. 240-246
Robert Madge, LSI Logic
Closing the loop from semiconductor manufacturing back to design and process development is crucial. In his invited address at the 2004 International Test Conference, Robert Madge explored the nanometer-era semiconductor yield challenges, classified the yield limiting problems, and discussed how to close the loop back to design and process development. This analysis, summarized in this Perspectives, reveals the key role of test and the data it generates to optimize semiconductor yield for the next generation.
Index Terms:
nanometer-era semiconductor, test paradigm, yield and manufacturability
Citation:
Robert Madge, "New test paradigms for yield and manufacturability," IEEE Design & Test of Computers, vol. 22, no. 3, pp. 240-246, May-June 2005, doi:10.1109/MDT.2005.67
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