Issue No.03 - May/June (2005 vol.22)
Jay Jahangiri , Mentor Graphics
David Abercrombie , Mentor Graphics
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.74
This article describes advanced design-for-manufacturability (DFM) test methods that target defect coverage, yield learning, and cost. The authors argue that testing can be useful for more than filtering chips: It can directly help target test patterns, provide DFM tools, and reduce overall costs.
advanced design-for-manufacturability, DFM test methods, defect testing techniques
Jay Jahangiri, David Abercrombie, "Value-Added Defect Testing Techniques", IEEE Design & Test of Computers, vol.22, no. 3, pp. 224-231, May/June 2005, doi:10.1109/MDT.2005.74