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On-Chip Self-Calibrating Communication Techniques Robust to Electrical Parameter Variations
November/December 2004 (vol. 21 no. 6)
pp. 524-535
Fr?d?ric Worm, Swiss Federal Institute of Technology Lausanne
Paolo Ienne, Swiss Federal Institute of Technology Lausanne
Patrick Thiran, Swiss Federal Institute of Technology Lausanne
Giovanni De Micheli, Stanford University
Editor's note: Dynamic self-calibration holds the promise of overcoming conservative worst-case design techniques needed to combat deep-submicron process and operating variations. This article proposes an on-chip point-to-point interconnect scheme characterized by self-calibration that can operate dynamically to achieve the best energy/performance trade-off. —Soha Hassoun, Tufts University
Citation:
Fr?d?ric Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli, "On-Chip Self-Calibrating Communication Techniques Robust to Electrical Parameter Variations," IEEE Design & Test of Computers, vol. 21, no. 6, pp. 524-535, Nov.-Dec. 2004, doi:10.1109/MDT.2004.96
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