1. Beginning from objective site z (currently unsatisfied), backtrace to PIs along all the X-paths in its fan-in cone.
2. Record every specified input to all unspecified gate outputs encountered in this depth-first search (in our example, there is only one X-path, z- h- d; f = 1 is the specified input of unspecified gate h; and g = 0 is the specified input of unspecified gate z).
3. Record the unspecified PIs at the end of each X-path ( d = X in the example).
Shuo Sheng is a research and development staff engineer in the Design for Test Division of Mentor Graphics. His research interests include ATPG and formal verification. Sheng has a BS from Huazhong University of Science and Technology, Wuhan, China; an MS from Tsinghua University, Beijing, China; and a PhD in computer engineering from Rutgers University. He is a member of the IEEE and Sigma Xi.
Michael S. Hsiao is an associate professor in the Electrical and Computer Engineering Department of Virginia Tech. His research interests include design verification, testing, and architectural issues of digital systems. Hsiao has a PhD in electrical engineering from the University of Illinois at Urbana-Champaign.